Verilong HDL Introduction (3rd Edition) (foreign digital system design classic textbook series) (A Verilog HDL Primer . Third Edition)(Chinese Edition) - (MEI) BA SI KE XIA YU WEN GAN WEI /(MEI GUO)(BHASKER
GATE-LEVEL MODELING (Source: a Verilog HDL Primer by J. Bhasker) - ppt download
VERILOG HDL SYNTHESIS: A PRACTICAL PRIMER : Bhasker J.: Amazon.in: Books
The Verilog HDL number system designs primer and applied solid example (Chinese edidion) Pinyin: Verilog HDL shu zi xi tong she ji ru men yu ying yong shi li - HU MEI
Verilog Hdl Synthesis: A Practical Primer : Bhasker, J.: Amazon.in: Books